CONFERENCE PROGRAMME

Monday, October 3

EFUG2011 Workshop (European FIB Users Group)
09:30 to 12:30Room: Agora
moderatorR. Langford - University of Cambridge (United Kingdom)
Reliability in harsh environment Workshop
14:00 to 15:40Room: Agora
moderatorE. Wolfgang - Siemens and ECPE (Germany)
EFUG2011 Workshop (European FIB Users Group)
14:00 to 18:00Room: Patio
moderatorR. Langford - University of Cambridge (United Kingdom)
15:40Coffee Break
Reliability in harsh environment Workshop
16:00 to 18:00Room: Agora
moderatorE. Wolfgang - Siemens and ECPE (Germany)
 

Tuesday, October 4

ESREF - ISROS workshop on packaging and failure analysis techniques of optoelectronic devices for aeronautic and space applications
8:30 to 13:00Room: IMS
moderatorsL. Bechou - IMS, University of Bordeaux (France)
A. Bensoussan - Thales Alenia Space (France)
Tutorial
 Room: Agora
08:50 Advanced CMOS - Application of reliability models in circuit design
V. Huard, N. Ruiz, F. Cacho, E. Pion
(STMicroelectronics, Crolles2 Alliance, 850 rue Jean Monnet, 38926 Crolles, France)
10:30Coffee Break
Tutorial
 Room: Agora
10:50 Fault Isolation in Semiconductor Product, Process, Physical and Package Failure Analysis: Importance and Overview
J. M. Chin, V. Narang, X. Zhao, M. Y. Tay, A. Phoa, V. Ravikumar, L. H. Ei, S. H. Lim, C. W. Teo, S. Zulkifli, M. C. Ong, M. C. Tan
(Advanced Micro Devices Singapore, 508 Chai Chee Lane, Singapore 469032, Singapore)
Tutorial
 Room: Patio
10:50 GaN-HEMTs parasitic and Reliability
J. L. Jimenez
(Triquint Semiconductor)
12:30Lunch
14:00Official opening of ESREF 2011
Session KKey note paper
 Room: Agora
chairpersonN. Labat - IMS, University of Bordeaux (France)
14:20 Invited paper
Challenges and opportunities in Performance, Reliability and Variability in sub-45nm CMOS Technologies
F. Arnaud, L. Pinzelli, C. Gallon, M. Rafik, P. Mora, F. Boeuf
(STMicroelectronics, 850 rue Jean Monnet, 38926 Crolles Cedex, France)
Session IRPSBest Paper IRPS
 Room: Agora
15:00 Invited paper
Electromigration-resistance enhancement with CoWP or CuMn for advanced Cu interconnects
C. Christiansen, B. Li, M. Angyal, T. Kane, V. Mcgahay, Y. Y. Wang, S. Yao
(IBM Microelectronics-USA)
Session IPFABest Paper IPFA
 Room: Agora
15:20 Invited paper
Study of the charge leakage of dual layer Pt metal nanocrystal-based high k-SiO2 flash memory cell
Y. N. Chena, K. L.  Peya, K. E. J. Gohb, Z. Z.  Lwina, P. K.  Singhc, S. Mahapatrac
(aNanyang Technological University, Singapore, bA*STAR, Singapore, cIndian Institute of Technology Bombay, India)
15:40Coffee Break
Session AaQuality and Reliability Techniques for Devices and Systems
 Room: Agora
chairpersonJ. Bisschop - NXP Semiconductors (The Netherlands)
16:00 Aa-1 #39Reliability analysis of continuous-time sigma-delta modulators
H. Cai, H. Petit, J.-F. Naviner
(LTCI-CNRS-UMR 5141-Institut TELECOM-TELECOM ParisTech, 46 rue Barrault, 75013 Paris Cedex 13, France)
16:20 Aa-2 #62Design Considerations and Strategies for High-Reliable STT-MRAM
W.S. Zhaoa,b, T. Devoldera,b, Y. Lakysa,b, J.O. Kleina,b, C. Chapperta,b, P. Mazoyerc
(aIEF, Univ. Paris-Sud 11, Orsay 91405, France, bUMR8622, CNRS, Orsay 91405, France, cSTMicroelectronics, 850 Rue Jean Monnet Crolles, Grenoble 38026, France)
16:40 Aa-3 #63FIFA: A Fault-Injection-Fault-Analysis-based tool for reliability assessment at RTL level
L.A.B. Navinera, J.-F. Navinera, G.G. Dos Santosa,b, E.C. Marquesc, N.M. Paivac
(aInstitut Télécom/Télécom ParisTech, CNRS-LTCI UMR 514, COMELEC, Paris, France, bÉlectricité de France, EDF R&D, Paris, France, cMilitary Institute of Engineering, Rio de Janeiro, Brazil)
17:00 Aa-4 #71Applying Bayesian mixtures-of-experts models to statistical description of smart power semiconductor reliability
O. Bludera,b, M. Glavanovicsb, J. Pilza
(aAlpen-Adria University Klagenfurt, Universitätsstr. 65-67, 9020 Klagenfurt, Austria, bKAI – Kompetenzzentrum Automobil- und Industrieelektronik GmbH, Europastr. 8, 9524 Villach, Austria)
Session F2 Aeronautic and Spatial electronics: robustness and reliability issues
 Room: Patio
chairpersonsJ-L. Muraro - THALES Alenia Space (France)
B. Foucher - EADS (France)
16:00 F2-1 #12Power cycling fatigue and lifetime prediction of power electronic devices in space applications
F. Vacher, B. Calvet, F. Mialhe
(CNES, French Space Agency, 18 Avenue Edouard Belin, 31500 Toulouse, France)
16:20 F2-2 #131Comparative Study of Sensitive Volume and Triggering Criteria of SEB in 600 V Planar and trench IGBTs
M. Zerarka, P. Austin, M. Bafleur
(CNRS; LAAS, 7 Avenue du Colonel Roche, F-31077 Toulouse, France, Universite´ de Toulouse, UPS, INSA, INP, ISAE, UT1, UTM, LAAS, F-31077 Toulouse, France)
16:40 F2-3 #157A New Test Methodology for an Exhaustive Study of Single-Event-Effects on Power MOSFETs
G. Busattoa, D. Bisellob,c, G. Curròd, P. Giubilatob,c, F. Iannuzzoa, S. Mattiazzob,c, D. Pantanob,c, A. Sanseverinoa, L. Silvestrinb,c, M. Tessarob, F. Velardia, J. Wyssb,e
(aDAEIMI, Università di Cassino, I-03043 Cassino (FR), Italy, bINFN Sez di Padova, I-35131 Padova, Italy, cDipartimento di Fisica, Università di Padova, I-35131 Padova, Italy, dST-Microelectronics, Stradale Primosole, 50, I-95121 Catania, Italy, eDiMSAT, Università di Cassino, I-03043 Cassino (FR), Italy)
17:00 F2-4 #144An original DoE-based tool for silicon photodetectors EoL estimation in space environments
P. Spezzigua, L. Bechoua, G. Quadrib, O. Gilardb, Y. Oustena, M. Vanzic
(aLaboratoire IMS, Université de Bordeaux, 351 Cours Libération, 33405 Talence Cedex, France, bCNES, 18 Avenue Edouard Belin, 31401 Toulouse Cedex 4, France, cDIEE, Università degli Studi di Cagliari, piazza d’Armi, 09123 Cagliari, Italy)
17:20Presentation of their activity by exhibitors
18:20Cocktail offered by Exhibitors
 

Wednesday, October 5

Session D1Failure Mechanisms in High Bandgap Devices and HBTs
 Room: Agora
chairpersonsN. Malbert - IMS, University of Bordeaux (France)
G. Meneghesso - University of Padova (Italy)
08:30 Invited paper
Reliability issues of GaN based high voltage power devices
J. Wuerfl, E. Bahat-Treidel, F. Brunner, E. Cho, O. Hilt, P. Ivo, A. Knauer, P. Kurpas, R. Lossy, M. Schulz, S. Singwald, M. Weyers, R. Zhytnytska
(Ferdinand-Braun-Institut, Leibniz Institut für Höchstfrequenztechnik, Gustav-Kirchhoff-Straße 4, 12489 Berlin, Germany)
09:10 D1-1 #65GaN-based HEMTs tested under high temperature storage test
D. Marcona,b, X. Kanga, J. Viaenea, M. Van Hovea, P. Srivastavaa,b, S. Decouterea, R. Mertensa,b, G. Borghsa,c
(aIMEC, Kapeldreef 75, B-3001 Leuven, Belgium, bKatholieke Universiteit Leuven, ESAT, Department of Electric Engineering, B-3000 Leuven, Belgium, cKatholieke Universiteit Leuven, Physics Department, B-3000 Leuven, Belgium)
09:30 D1-2 #28Electrical characterization and reliability study of integrated GaN power amplifier in multi-layer thin-film technology
R. Liua,b, D. Schreursa, W. De Raedtb, F. Vanaverbekeb, J. Dasb, R. Mertensa,b, I. De Wolfb,c
(aDepartment of Electrical Engineering, K.U. Leuven, Kasteelpark Arenberg 10, 3001 Leuven, Belgium, bImec vzw, Kapeldreef 75, 3001 Leuven, Belgium, cDepartment of Metallurgy and Materials Engineering, K.U. Leuven, Kasteelpark Arenberg 44, 3001 Leuven, Belgium)
09:50 D1-3 #124Electro-Thermal characterization of AlGaN/GaN HEMT on Silicon Microstrip Technology
M. Riccioa, A. Pantellinib, A. Iracea, G. Breglioa, A. Nannib, C. Lanzierib
(aUniversity of Naples Federico II, Department of Biomedical, Electronic and Telecommunication Engineering, Via Claudio 21, 80125 Naples, Italy, bSELEX Sistemi Integrati, Via Tiburtina km 12.400, 00131 Rome, Italy)
10:10 D1-4 #142Reliability of submicron InGaAs/InP DHBT on Accelerated Aging Tests under Thermal and Electrical stresses
G.A. Konéa, B. Grandchampa, C. Hainauta, F. Marca, C. Maneuxa, N. Labata, T. Zimmera, V. Nodjiadjimb, M. Rietb, J. Godinb
(aIMS, CNRS UMR 5818, Université Bordeaux 1-351, Cours de la Libération, F-33405 Talence, France, bIII-V Lab, Joint Lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay, F-91461 Marcoussis Cedex, France)
10:30 D1-5 #143Investigation of the degradation mechanisms of InP/InGaAs DHBT under bias stress conditions to achieve electrical aging model for circuit design
S. Ghosha, B. Grandchampa, G.A. Konéa, F. Marca, C. Maneuxa, T. Zimmera, V. Nodjiadjimb, M. Rietb, J.-Y. Dupuyb, J. Godinb
(aLaboratoire IMS, Université de Bordeaux, CNRS UMR 5218, 351, Cours de la liberation, F-33405 Talence, France, bIII-V Lab, Joint Lab: Bell Labs, Thales Research and Technology and CEA-LETI, Route de Nozay, F-91461 Marcoussis Cedex, France)
Session F1Design for reliability of power devices
 Room: Patio
chairpersonsE. Wolfgang - Siemens and ECPE (Germany)
M. Ciappa - ETH Zurich (Switzerland)
09:10 F1-1 #38Mechanism of breakdown voltage wavering in power MOSFET induced by silicon crystalline defect
Y. Weber
(Freescale Semiconducteurs France SAS, Toulouse Product Analysis Lab., 134 Avenue du Général Eisenhower, B.P. 72329, 31023 Toulouse, Cedex, France)
09:30 F1-2 #82Improved thermal management of low voltage power devices with optimized bond wire positions
H. Köcka,b, C. Djelassia,b, S. D. Filippisa,d, R. Illingc, M. Nelhiebelc, M. Ladurnerc, M. Glavanovicsa, D. Poganye
(aKAI (Kompetenzzentrum Automobil- und Industrie-Elektronik) GmbH, Europastrasse 8, 9524 Villach, Austria, bInstitute of Smart System-Technologies, Alpen-Adria University Klagenfurt, Universitätsstraße 65-67, 9020 Klagenfurt, Austria, cInfineon Technologies Austria AG, Siemensstrasse 2, 9500 Villach, Austria, dUniversità degli Studi di Napoli “Federico II”, Dipartimento di Ingegneria Biomedica, Elettronica e delle Telecomunicazioni, via Claudio 21, 80125 Napoli, Italy, eInstitute for Solid State Electronics, Vienna University of Technology, Floragasse 7-1, 1040 Vienna, Austria)
09:50 F1-3 #1Comparison of IGBT Short-Circuit Failure "Ohmic Mode": Epoxy Molded Package versus Silicone Gel Module for New Fail-Safe and Interruptible Power Converters
F. Richardeau, Z. Dou, E. Sarraute, J.-M. Blaquiere, D. Flumian
(CNRS, LAPLACE, F-31071 Toulouse, France, University of Toulouse, INP Toulouse, UPS, LAPLACE (Laboratoire Plasma et Conversion d’Energie), ENSEEIHT, 2 rue Charles Camichel, BP 7122, F-31071 Toulouse cedex 7, France)
10:10 F1-4 #148A reliable technology concept for active power cycling to extreme temperatures
M. Nelhiebela, R. Illinga, C. Schreibera, S. Wöhlerta, S. Lanzerstorfera, M. Ladurnera, C. Kadowb, S. Deckerb, D. Dibrab, H. Unterwalcherc, M. Rogallid, W. Robld, T. Herzigd, M. Poschgana, M. Inselsbachera, M. Glavanovicsc, S. Fraisséb
(aInfineon Technologies Austria AG, Villach, Austria, bInfineon Technologies AG, Munich, Germany, cKompetenzzentrum für Automobil und Industrieelektronik (KAI), Villach, Austria, dInfineon Technologies AG, Regensburg, Germany)
10:30 F1-5 #53Structure Oriented Compact Model for Advanced Trench IGBTs without Fitting Parameters for Extreme Condition: part I
M. Tanaka, I. Omura
(Kyushu Institute of Technology, 1-1 Sensui-cho, Tobata-ku, Kitakyushu-city 804-8550, Japan)
10:50Coffee Break
Session DFNew technologies for power devices
 Room: Agora
chairpersonsG. Meneghesso - University of Padova (Italy)
N. Malbert - IMS, University of Bordeaux (France)
11:10 Invited paper
Accelerated Testing under Complex Loading Conditions: Benefits and Challenges
O. Wittler, J. Jaeschke, A. Middendorf, O. Bochow-Ness, N. Nissen,, K.-D.  Lang
(IZM Berlin, Germany)
11:50 DF-1 #147Operation of SiC normally-off JFET at the edges of its Safe Operating Area
C. Abbate, G. Busatto, F. Iannuzzo
(DAEIMI – Dept. of Automation, Electromagnetism, Information Engineering and Industrial Mathematics, University of Cassino, Via G. Di Biasio, 43, 03043 Cassino (FR), Italy)
12:10 DF-2 #77A Study of SiC Power BJT Performance and Robustness
A. Castellazzia, T. Takunob, R. Onishic, T. Funakic, T. Kimotod, T. Hikiharab
(aPower Electronics, Machines and Control Group, University of Nottingham, Nottingham NG7 2RD, UK, bPower Conversion & System Control Laboratory, Kyoto University, 615-8510 Katsura, Kyoto, Japan, cPower Systems Laboratory, Osaka University, 565-0871 Suita, Osaka, Japan, dSemiconductor Science & Engineering Laboratory, Kyoto University, 615-8510 Katsura, Kyoto, Japan)
12:30 DF-3 #154High Temperature Long Term Stability of SiC Schottky Diodes
A. Testaa, S. De Caroa, S. Russob, D. Pattib, L. Torrisib
(aDCIIM, University of Messina, Messina, Italy, bST Microelectronics, Catania, Italy)
Session AbQuality and Reliability Techniques for Devices and Systems
 Room: Patio
chairpersonJ. Bisschop - NXP Semiconductors (The Netherlands)
11:50 Ab-1 #114Statistical Modelling of Reliability in Logic Devices
J. Schleifer, T. Coenen, T. G. Noll
(Chair of Electrical Engineering and Computer Systems, RWTH Aachen University, Schinkelstr. 2, Aachen, Germany)
12:10 Ab-2 #120Reliability assessment on a new resistive non-volatile memory element based on SiCr-O
Y. Lia, R. Delangleb, X.-M. Zhanga, B. Hovensa
(aNXP Semiconductors, Gerstweg 2, 6534AE Nijmegen, Netherlands, bInternship Student, CPE Lyon, France)
12:30 Ab-3 #150Design of Optimum Electron Beam Irradiation Processes for the Reliability of Electric Cables used in Critical Applications
M. Ciappaa, L. Mangiacapraa, M. Stangonib, S. Ottb, W. Fichtnera
(aETH Zurich, Integrated Systems Laboratory, Zurich, Switzerland, bHUBER+SUHNER AG, Wire+Cable Division, Pfaeffikon, Switzerland)
12:50Lunch
Session D2Failure Mechanisms in Photonic Devices
 Room: Agora
chairpersonsG. Meneghesso - University of Padova (Italy)
N. Malbert - IMS, University of Bordeaux (France)
14:00 Invited paper
Do we understand the degradation mechanisms of InGaN laser diode?
P. Perlin
( TopGaN, Warsaw Area, Poland)
14:40 D2-1 #70Degradation mechanisms of high-power white LEDs activated by current and temperature
M. Dal Lago, M. Meneghini, N. Trivellin, G. Meneghesso, E. Zanoni
(Department of Information Engineering, University of Padova, v. Gradenigo 6/B, 35131 Padova, Italy)
15:00 D2-2 #99Degradation of InGaN lasers: role of non-radiative recombination and injection efficiency
N. Trivellina, M. Meneghinia, C. De Santia, S. Vaccaria, G. Meneghessoa, E. Zanonia, K. Oritab, S. Takigawab, T. Tanakab, D. Uedab
(aDepartment of Information Engineering of the University of Padova, Italy, via Gradenigo 6/B35131 Padova, Italy, bPanasonic Corporation, Semiconductor Device Research Center, SDRC, 1 Kotari-yakemachi, Nagaokakyio City, Kyoto 317-8520, Japan)
15:20 D2-3 #108DC parameters for laser diodes from experimental curves
M. Vanzia, G. Murab, G. Martinesa
(aDIEE-INFM, University of Cagliari, Piazza D’Armi, 09123 Cagliari, Italy, bTelemicroscopy Laboratory, Sardegna Ricerche, 09010 Pula, Cagliari, Italy)
15:40 D2-4 #59Measurement and simulation of interfacial adhesion strength between SiO2 thin film and III-V material
T.-L. Chou, S.-Y. Yang, C.-J. Wu, C.-N. Han, K.-N. Chiang
(Department of Power Mechanical Engineering, National Tsing Hua University, Hsinchu 300, Taiwan, ROC)
16:00 D2-5 #132Thermal Stress Effects on Dye-Sensitized Solar Cells (DSSCs)
D. Baria, N. Wrachiena, R. Tagliaferrob, S. Pennab, T.M. Brownb, A. Realeb, A. Di Carlob, G. Meneghessoa, A. Cestera
(aDEI, Department of Information Engineering, University of Padova, Padova, Italy, bCHOSE, Department of Electronic Engineering, University of Rome, “Tor Vergata”, Roma, Italy)
Session FEModelling for power devices reliability
 Room: Patio
chairpersonsM. Ciappa - ETH Zurich (Switzerland)
E. Wolfgang - Siemens and ECPE (Germany)
14:40 FE-1 #105Effect of high temperature aging on reliability of automotive electronics
D.G. Yanga, F.F. Wana, Z.Y. Shoua, W.D. Van Drielb, H. Scholtenc, L. Goumansc, R. Fariac
(aGuilin University of Electronic Technology, Guilin, China, bPhilips Lighting, Eindhoven, The Netherlands, cNXP Semiconductors, Nijmegen, The Netherlands)
15:00 FE-2 #1613D Electro-thermal modelling of bonding and metallization ageing effects for reliability improvement of power MOSFETs
T. Azouia,b, P. Tounsia,b, P. Dupuyc, L. Guillotc, J.M. Dorkela,b
(aCNRS, LAAS, 7 avenue du Colonel Roche, F-31077 Toulouse, France, bUniversité de Toulouse, UPS, INSA, INP, ISAE, LAAS, F-31077 Toulouse, France, cFreescale Semiconducteurs France SAS, 134 avenue du Général Eisenhower, 31023 Toulouse, France)
15:20 FE-3 #83Dynamic electro-thermal modeling for power device assemblies
P. Cova, M. Bernardoni, N. Delmonte, R. Menozzi
(University of Parma, Dipartimento di Ingegneria dell’Informazione, Parco Area delle Scienze 181/A, 43124 Parma, Italy)
15:40 FE-4 #102ANSYS based 3D electro-thermal simulations for the evaluation of power MOSFETs robustness
S. De Filippisa,b, V. Košelb, D. Dibrac, S. Deckerc, H. Köckd,b, A. Iracea
(aUniversità degli Studi di Napoli “Federico II”, Dipartimento di Ingegneria Biomedica, Elettronica e delle Telecomunicazioni, via Claudio 21, 80125 Napoli, Italy, bKAI, Kompetenzzentrum Automobil- und Industrie-Elektronik GmbH, Europastrasse 8, 9524 Villach, Austria, cInfineon Technologies AG, Am Campeon 1-12, D-85579 Neubiberg, Germany, dInstitute of Smart System-Technologies, Alpen-Adria University, Universitätsstraße 65-67, 9020 Klagenfurt, Austria)
16:00 FE-5 #94Electric Field Unbalance for Robust Floating Ring Termination
A. Villamor-Baliardaa,b, P. Vanmeerbeekb, J. Roigb, P. Moensb, D. Floresa
(aInstituto de Microelectrónica de Barcelona (IMB-CNM-CSIC), 08193 Barcelona, Spain, bON Semiconductor, Westerring 15, B-9700 Oudenaarde, Belgium)
16:20Coffee Break
Poster Session
16:40See below for detailled programme
EUFANET 2011 meeting (European Failure Analysis NETwork)
18:00 to 20:00Room: Agora
moderatorM. Savoia - STMicroelectronics (Italy)
 

Thursday, October 6

Session B3EOS/ESD events and impact from system to device
 Room: Agora
chairpersonsH. Gieser - Fraunhofer Emft - Munchen (Germany)
Ph. Galy - STMicroelectronics (France)
08:30 Invited paper
Application of Transient Interferometric Mapping for ESD and latch-up analysis
D. Pogany, S. Bychikhin, M. Heer, W. Mamanee, E. Gornik
(Institute for Solid State Electronics, Vienna University of Technology, Floragasse 7, A-1040 Vienna, Austria)
09:10 B3-1 #107Identifying electrical mechanisms responsible for functional failures during harsh external ESD and EMC aggressions
P. Bessea, K. Aboudaa, C. Aboudab
(aAnalog, Mixed Signal and Power Division, Freescale Semiconductor, 134 Avenue Eisenhower, BP 72329, 31023 Toulouse Cedex 1, France, bQuality Division, Freescale Semiconductor, 134 Avenue Eisenhower, BP 72329, 31023 Toulouse Cedex 1, France)
09:30 B3-2 #80EOS/ESD Sensitivity of a GaAs MMIC Microwave Power Amplifier
A. Tazzolia,b, I. Rossettoa, E. Zanonia,c, D. Yufengd, T. Tomasid, G. Meneghessoa,c
(aUniversity of Padova, Department of Information Engineering, Via Gradenigo 6/B, 35131 Padova, Italy, bUniversity of Pennsylvania, Dept. of Electrical and Systems Engineering, Philadelphia, USA, cItalian Universities NanoElectronics Team (IUNET), 40125 Bologna, Italy, dHUAWEI Technologies, Centro Direzionale Milano 2, Palazzo Verrocchio, 3rd floor, 20090 Segrate (MI), Italy)
09:50 B3-3 #58Reliability impact due to high current, lattice and hot carriers temperature on beta 2x2 matrix ESD power devices for advanced CMOS technologies
P. Galy, J. Bourgeat, J. Jimenez, B. Jacquier, D. Marin-Cudraz, S. Dudit
(STMicroelectronics, 850 rue Jean Monnet, 38926 Crolles, France)
10:10 B3-4 #64A Full Characterization of single pitch IO ESD protection based on Silicon Controlled Rectifier and Dynamic trigger Circuit in CMOS 32nm node
J. Bourgeat, P. Galy, A. Dray, J. Jimenez, D. Marin-Cudraz, B. Jacquier
(STMicroelectronics, 850, rue Jean Monnet F-38926 Crolles cedex, France)
Session E1aPackaging Reliability
 Room: Patio
chairpersonsH. Fremont - IMS, University of Bordeaux (France)
F. Coccetti - LAAS-CNRS (France)
09:10 E1a-1 #56Thermal-mechanical behavior of the bonding wire for a power module subjected to the power cycling test
T.Y. Hunga,b, S.Y. Chianga,b, C.J. Huanga,b, C.C. Leed, K.N. Chianga,b,c
(aAdvanced Microsystem Packaging and Nano-Mechanics Research Lab, National Tsing Hua University, HsinChu 300, Taiwan, ROC, bDepartment of Power Mechanical Engineering, National Tsing Hua University, HsinChu 300, Taiwan, ROC, cDirector of National Center for High-Performance Computing, National Applied Research Laboratories, Taiwan, ROC, dDepartment of Mechanical Engineering, Chung Yuan Christian University, ChungLi 32023, Taiwan, ROC)
09:30 E1a-2 #92A study of the effect of degradation of the aluminium metallization layer in the case of power semiconductor devices
S. Pietranicoa,b, S. Lefebvrea, S. Pommierb, M. Berkani Bouaroudja, S. Bontempsc
(aSATIE, ENS de Cachan, CNRS, CNAM, UniverSud Paris 61 Av. du President Wilson, 94235 Cachan, France, bLMT, ENS de Cachan, CNRS, UniverSud Paris 61 Av. du President Wilson, 94235 Cachan, France, cMicrosemi Power Module Products, 26 rue de Campilleau, F33520 Bruges, France)
09:50 E1a-3 #25Investigations of Thermal Interfaces aging under Thermal cycling conditions for Power Electronics Applications
J.P. Ousten, Z. Khatir
(IFSTTAR – Laboratory of New Technologies, 25 Allée des Marronniers, Versailles 78008 Cedex, France)
10:30Coffee Break
Session C1aAdvanced Techniques for failure analysis and Case studies: EOBT
 Room: Agora
chairpersonsR. Heiderhoff - University of Wuppertal (Germany)
P. Poirier - Presto Engineering (France)
10:50 Invited paper
From Component to System Failure Analysis – the future challenge within work-sharing supply chains
P. Jacob
(Empa – Swiss Federal Laboratories for Materials Testing and Research, Dept.173 Electronics/Reliability/Metrology, Ueberlandstrasse 129, CH 8600 Duebendorf, Switzerland)
11:30 C1a-1 #127Performance improvement of backside reflected light imaging and photon emission microscopy using Si-CCD detector by ultimate backside substrate thinning.
A. Glowackia, C. Boita, P. Perdub
(aSemiconductor Devices Division, Berlin University of Technology, Berlin, Einsteinufer 19, 10587 Berlin, Germany, bFrench Space Agency (CNES), Toulouse, France)
11:50 C1a-2 #165Chromatic and Spherical Aberration Correction for Silicon Aplanatic Solid Immersion Lens for Fault Isolation and Photon Emission Microscopy of Integrated Circuits
B.B. Goldberga,e, A. Yurtb, Y. Luc, E. Ramsaya, F.H. Köklüd, J. Mertze, T.G. Bifanoc,e, M.S. Ünlüd,e
(aDepartment of Physics, Boston University, Boston, MA, USA, bDepartment of Materials Science and Engineering, Boston University, Boston, MA, USA, cDepartment of Mechanical Engineering, Boston University, Boston, MA, USA, dDepartment of Electrical and Computer Engineering, Boston University, Boston, MA, USA, eCenters for Nanoscience and Photonics, Boston University, Boston, MA, USA)
12:10 C1a-3 #61Time Resolved Imaging: From logical states to events, a new and efficient method for VLSI analysis
G. Bascoula, P. Perdua, A. Benignia, S. Duditb, G. Celib, D. Lewisc
(aCNES, DCT/AQ/LE, Bpi 1414, 18 Av. Ed. Belin, 31400 Toulouse Cedex 9, France, bSTMicroelectronics, 850 Rue Jean Monnet, 38920 Crolles, France, cUniversité de Bordeaux, IMS Laboratory, 351 Cours de la Libération, 33405 Talence, France)
12:30 C1a-4 #109Failure Analysis defect location on a real case 55nm memory using Dynamic Power Supply emulation
T. Parrassin, G. Celi, S. Dudit, M. Vallet
(STMicroelectronics, 850 rue Jean Monnet, 38920 Crolles, France)
Session E1bPackaging Reliability
 Room: Patio
chairpersonsF. Coccetti - LAAS-CNRS (France)
H. Fremont - IMS, University of Bordeaux (France)
11:30 E1b-1 #35Warpage analysis of layered structures connected by direct brazing
T. Asadaa, Y. Yagia, M. Usuia, T. Suzukib, N. Ohnoc
(aToyota Central R&D Laboratories Inc., 41-1, Yokomichi, Nagakute, Nagakute-cho, Aichi 480-1192, Japan, bToyota Motor Corporation, 1, Toyota-cho, Toyota, Aichi 471-8572, Japan, cDepartment of Computational Science and Engineering, Nagoya Univ., Chikusa-ku, Nagoya 464-8603, Japan)
11:50 E1b-2 #41Warpage variations of Si/solder/OFHC-Cu layered plates subjected to cyclic thermal loading
H. Taniea, K. Nakaneb,c, Y. Uratac, M. Tsudac, N. Ohnoc,d
(aHitachi Research Laboratory, Hitachi Ltd., 832-2, Horiguchi, Hitachinaka 312-0034, Japan, bCAE Design Promotion Department, DENSO CORPORATION, 1-1, Showa-cho, Kariya 448-8661, Japan, cDepartment of Computational Science and Engineering, Nagoya University, Chikusa-ku, Nagoya 464-8603, Japan, dDepartment of Mechanical Science and Engineering, Nagoya University, Chikusa-ku, Nagoya 464-8603, Japan)
12:10 E1b-3 #79Experimental power cycling on insulated TRIAC package: Reliability interpretation thanks to an innovative failure analysis flow
A. Auberta,c, S. Jacquesa,b, S. Pétremonta, N. Labatc, H. Frémontc
(aSTMicroelectronics, 16 rue Pierre et Marie Curie, BP 7155, 37071 Tours Cedex 2, France, bPower Microelectronics Laboratory (LMP),16 rue Pierre et Marie Curie, BP 7155, 37071 Tours Cedex 2, France, cIMS Laboratory, University Bordeaux 1, CNRS, 351 cours de la Libération, 33405 Talence Cedex, France)
12:30 E1b-4 #2Experiment and numerical analysis for edge and corner bonded PoP bottom package assemblies under four-point bending
H. Shia, F. Cheb, T. Uedaa
(aRoom S257, Graduate School of Information, Production and Systems, Waseda University, 2-7 Hibikino, Wakamatsu-ku, Kitakyushu-shi, Fukuoka 808-0135, Japan, bInstitute of Microelectronics, A*STAR (Agency for Science, Technology and Research), 11 Science Park Road, Singapore Science Park II, Singapore 117685, Singapore)
12:50Lunch
Session B1Failure Mechanisms in Si technologies and Nanoelectronics: Hot carriers, high K...
 Room: Agora
chairpersonsA. Bravaix - ISEN-IM2PN (France)
J. Stathis - IBM Research (USA)
14:00 Invited paper
HCI and NBTI Induced Degradation and Impacts on Circuits Aging in Gate-all-Around Silicon Nanowire Transistors
R. Huang, R. Wang, C. Liu, L. Zhang, J. Zhuge, Y. Tao, J. Zou, Y. Liu, Y. Wang
(Institute of Microelectronics, Peking University, Beijing 100871, China)
14:40 B1-1 #27Positive bias temperature instabilities on sub-nanometer EOT finFETs
P.C. Feijooa,b, M. Choa, M. Togoa, E. San Andrésb, G. Groesenekena
(aIMEC, Kapeldreef 75, B-3001 Leuven, Belgium, bDpto. Física Aplicada III, Fac. de CC. Físicas, Universidad Complutense, Av. Complutense S/N, 28040 Madrid, Spain)
15:00 B1-2 #163An analytical approach for physical modeling of hot-carrier induced degradation
S. Tyaginova,b, I. Starkovc, H. Enichlmaird, C. Jungemanne, J.M. Parkd, E. Seebacherd, R. Orioa, H. Cericc, T. Grassera
(aInstitute for Microelectronics, TU Wien, Gußhausstraße 27-29, A-1040 Vienna, Austria, bA.F.Ioffe Physical–Technical Institute, 26 Polytechnicheskaya Str., 194021 St.-Petersburg, Russia, cChristian Doppler Laboratory for Reliability Issues in Microelectronics at IUE, TU Wien, Gußhausstraße 27-29, A-1040 Vienna, Austria, dAustriamicrosystems AG, Unterpremstätten, Austria, eInstitute für Theoretische Elektrotechnik, RWTH Aachen, Germany)
15:20 B1-3 #37Impact of gate poly doping and oxide thickness on the N- and PBTI in MOSFETs
G. Pobegena,c, T. Aichingerb, T. Grasserc, M. Nelhiebeld
(aKAI (Kompetenzzentrum für Automobil und Industrie-Elektronik), Europastraße 8, A-9524 Villach, Austria, bThe Pennsylvania State University, 101 Earth Engineering Science Building, University Park, PA 16802, USA, cInstitute for Microelectronics, Technical University Vienna, Gußhausstraße 27-29/E360, A-1040 Vienna, Austria, dInfineon Technologies Austria AG, Siemensstraße 2, A-9500 Villach, Austria)
15:40 B1-4 #42A Generalization of the Curie-von Schweidler Law for the Leakage Current Decay in MIS Structures Including Progressive Breakdown
E. Mirandaa, C. Mahatab, T. Dasb, C.K. Maitib
(aDepartament d’Enginyeria Electrònica, Universitat Autònoma de Barcelona, 08193 Bellaterra, Barcelona, Spain, bDepartment of Electronics and Electrical Communication Engineering, Indian Institute of Technology, Kharagpur, India)
16:00 B1-5 #104NBTI related degradation and lifetime estimation in p-channel power VDMOSFETs under the static and pulsed NBT stress conditions
I. Manica, D. Dankovica, A. Prijica, V. Davidovica, S. Djoric-Veljkovicb, S. Golubovica, Z. Prijica, N. Stojadinovica
(aFaculty of Electronic Engineering, University of Niš, A. Medvedeva 14, 18000 Niš, Serbia, bFaculty of Civil Engineering, University of Niš, A. Medvedeva 14, 18000 Niš, Serbia)
Session C2Advanced Techniques for failure analysis and Case studies
 Room: Patio
chairpersonsPh. Perdu - CNES (France)
M. Vanzi - University of Cagliari (Italy)
14:40 C2-1 #141Thermal Impedance Spectroscopy of Power Modules
A. Henslera, D. Wingerta, C. Herolda, J. Lutza, M. Thobenb
(aChemnitz University of Technology, Chemnitz, Germany, bInfineon Technologies AG, Warstein, Germany)
15:00 C2-2 #135Magnetic Field Spatial Fourier Analysis: A New Opportunity for High Resolution Current Localization
F. Infantea, P. Perdub, H.B. Korb,c, C.L. Ganc, D. Lewisd
(aIntraspec Technologies, 29 rue Jeanne Marvig, 31400 Toulouse, France, bCNES, 18 Avenue E. Belin, 31401 Toulouse, France, cNanyang Technological University, School of Materials Science & Engineering, 50 Nanyang Avenue, Singapore 639798, Singapore, dUniversité Bordeaux 1, 351 Cours de la Libération, 33405 Talence, France)
15:20 C2-3 #74Tiny-scale "stealth" current sensor to probe power semiconductor device failure
Y. Kashoa, H. Hiraia, M. Tsukudaa,b, I. Omuraa
(aKyushu Institute of Technology, 1-1 Sensui-cho, Tobata-ku, Kitakyushu 804-8550, Japan, bThe International Center for the Study of East Asian Development, 1-103 Hibikinokita, Wakamatsu-ku, Kitakyushu 808-0138, Japan)
15:40 C2-4 #129Comprehensive nano-structural study of SSRM nanocontact on silicon
T. Delaroquea, B. Domengèsb, A. Coldera, K. Daniloa
(aPresto-Engineering Europe, 2 rue de la Girafe, 14000 Caen, France, bLAMIPS, CRISMAT – NXP Semiconductors Laboratory, CNRS-UMR6508, ENSICAEN, UCBN, Presto-Engineering Europe, 2 rue de la Girafe, 14000 Caen, France)
16:00 C2-5 #31Failure mechanisms in advanced BCD technology during reliability qualification
J.G. Van Hassel, G.A.D. Bock, G. Van Den Berg
(NXP Semiconductors, Department: Regional Quality Centre Europe, Gerstweg 2, 6534 AE, Nijmegen, The Netherlands)
16:20Coffee Break
17:00Bus departure to gala dinner
 

Friday, October 7

Session E3MEMS Reliability
 Room: Agora
chairpersonsI. De Wolf - IMEC (Belgium)
C. Pellet - IMS, University of Bordeaux (France)
08:30 Invited paper
Dielectric charging phenomenon in electrostatically driven MEMS/NEMS devices: Nanoscale and macroscale characterization using novel assessment methodologies
U. Zaghloula,b,c, G. Papaioannoud, B. Bhushanc, F. Coccettia,b, P. Ponsa,b, R. Planaa,b
(aCNRS, LAAS, 7 avenue du colonel Roche, F-31077 Toulouse, France, bUniversité de Toulouse, UPS, INSA, INP, ISAE, LAAS, F-31077 Toulouse, France, cNLBB Laboratory, The Ohio State University, Columbus, OH 43210, USA, dUniversity of Athens, Solid State Physics, Panepistimiopolis, Zografos, Athens, Greece)
09:10 E3-1 #24An active heat-based restoring mechanism for improving the reliability of RF-MEMS switches
J. Iannaccia, A. Faesa, A. Repchankovaa, A. Tazzolib,1, G. Meneghessob
(aMEMS Research Unit, Fondazione Bruno Kessler – FBK, Via Sommarive 18, 38123 Povo, Trento, Italy, bDepartment of Information Engineering, University of Padova and IUNET, Via Gradenigo 6/b, 35100 Padova, Italy)
09:30 E3-2 #84Determination of bulk discharge current in the dielectric film of MEMS capacitive switches
M.S. Koutsoureli, G.J. Papaioannou
(Solid State Physics Section, Physics Department, National and Kapodistrian University of Athens, Panepistimioupolis, Zografos, Athens 15784, Greece)
09:50 E3-3 #106Outgassing study of thin films used for poly-SiGe based vacuum packaging of MEMS
B. Wanga,c, S. Tanakab, B. Guoa, G. Vereeckea, S. Severia, A. Witvrouwa, M. Weversc, I. De Wolfa,c
(aImec, Kapeldreef 75, Leuven B-3001, Belgium, bDepartment of Nanomechanics, Tohoku University, Sendai 980-8579, Japan, cDepartment of Metallurgy and Materials Engineering, K.U. Leuven, Kasteelpark Arenberg 44, 3001 Heverlee, Belgium)
Session B2Electromigration and simulation
 Room: Patio
chairpersonsF. Fantini - University of Modena (Italy)
Y. Danto - IMS, University of Bordeaux (France)
09:10 B2-1 #49Analysis of critical-length data from Electromigration failure studies
V.M. Dwyer
(Department of Electronic and Electrical Engineering, Loughborough University, Loughborough LEU 3TU, UK)
09:30 B2-2 #51A compact model for early electromigration failures of copper dual-damascene interconnects
R.L. De Orioa,b, H. Cerica,b, S. Selberherra
(aInstitute for Microelectronics, TU Wien, Gußhausstraße 27–29/E360, 1040 Wien, Austria, bChristian Doppler Laboratory for Reliability Issues in Microelectronics, Austria)
09:50 B2-3 #96Influence of test structure design on Stress-Induced-Voiding using an experimentally validated finite element modeling approach
M. Lofranoa, K. Croesa, I. De Wolfa,b, C.J. Wilsona
(aImec, Kapeldreef 75, B-3001 Leuven, Belgium, bK.U. Leuven, Dept. MTM, Kasteelpark Arenberg 44 – Bus 2450, 3001 Leuven, Belgium)
10:10Coffee Break
Session C1bAdvanced Techniques for failure analysis and Case studies: EOBT
 Room: Agora
chairpersonsP. Poirier - Presto Engineering (France)
R. Heiderhoff - University of Wuppertal (Germany)
10:30 Invited paper
The combinational usage of the laser SQUID microscope, the laser terahertz emission microscope, and fault simulations in non-electrical-contact fault localization
K. Nikawaa, M. Yamashitab, T. Matsumotoc, K. Miuraa, Y. Midoha, K. Nakamaea
(aGraduate School of Information Science and Technology, Osaka University, 2-1 Yamada-oka, Suita, Osaka 565-0871, Japan, bTerahertz Sensing and Imaging Laboratory, RIKEN Sendai, 519-1399 Aoba, Aramaki, Aoba, Sendai, Miyagi 982-0036, Japan, cHamamatsu Photonics, 812 Joko-cho, Higashi, Hamamatsu, Shizuoka 431-3196, Japan)
11:10 C1b-1 #101Laser induced impact ionization effect in MOSFET during 1064 nm Laser Stimulation
S. K. Brahmaa, A. Glowackib, R. Leihkaufb, C. Boitb
(aNational Institute of Technology, Agartala, India, bBerlin University of Technology, Einsteinufer 19, Sekr. E2, D-10587 Berlin, Germany)
11:30 C1b-2 #116Photoelectric Laser Stimulation applied to Latch-Up phenomenon and localization of parasitic transistors in an industrial failure analysis laboratory
R. Llidoa, J. Gomeza, V. Goubiera, N. Froidevauxa, L. Dufayarda, G. Hallera, V. Pougetb, D. Lewisb
(aSTMicroelectronics, 190 avenue Célestin Coq, 13106 Rousset, France, bUniversité de Bordeaux, IMS Laboratory, 351 cours de la Libération, 33405 Talence, France)
11:50 C1b-3 #36LVI detection on passive structure in advance CMOS technology: new opportunity for device Analysis
G. Celia, S. Dudita, T. Parrassina, P. Perdub, A. Reverdyc, D. Lewisd, M. Valleta
(aSTMicroelectronics, 850 rue Jean Monnet, 38920 Crolles, France, bCNES Laboratory, 18 Avenue Edouard Belin, 31401 Toulouse, France, cSECTOR Technologies, 2 avenue de Vignate, 38610 Gières, France, dUniv. Bordeaux, IMS Laboratory, 351 cours de la libération, 33400 Talence, France)
12:10 C1b-4 #128Foundry workflow for dynamic-EFA-based yield ramp
C. Kardacha, I. Kapilevicha, J. Blocka, T. Lundquista, S. Kasapib, J. Liaob, Y.S. Ngb, B. Coryb
(aDCG Systems, Inc., 45900 Northport Loop E, Fremont, CA 94538, USA, bNVIDIA Corp., Santa Clara, CA, USA)
Session E2Reliability of Interconnections
 Room: Patio
chairpersonsH. Fremont - IMS, University of Bordeaux (France)
F. Coccetti - LAAS-CNRS (France)
11:10 E2-1 #26Migration induced material transport in Cu-Sn IMC and SnAgCu micro bumps
L. Meinshausena,b, K. Weide-Zaagea, H. Frémontb
(aInformation Technology Laboratory LFI, Leibniz Universität Hannover, Schneiderberg 32, 30167 Hanover, Germany, bLaboratoire IMS, Université de Bordeaux I, France)
11:30 E2-2 #22Cu pumping in TSVs: Effect of pre-CMP thermal budget
I. De Wolfa,b, K. Croesa, O. Varela Pedreiraa, R. Labiea, A. Redolfia, M. Van De Peera, K. Vanstreelsa, C. Okoroa, B. Vandeveldea, E. Beynea
(aimec, Leuven, Belgium, bDept. MTM, KULeuven, Leuven, Belgium)
11:50 E2-3 #103Cratering Response Method to Study the Effect of Ultrasonic Energy on Cu-wire Bonding Quality
R.T.H. Rongena, A. Van Ijzerlooa, C. Cotofanaa, K.M. Lanb
(aNXP Semiconductors, Gerstweg 2, 6534 AE Nijmegen, The Netherlands, bNXP Semiconductors, No. 10, Jing 5th Road, N.E.P.Z. Kaohsiung 811, Taiwan, ROC)
12:30Announcement of ESREF 2011 Best Paper Awards
Conference closing
 

Poster Papers

AP-1 #34Impact of Modularity and Redundancy in Optimising the Reliability of Power Systems that Include a High Number of Power Converters
D. Siemaszko, S. Pittet
(CERN – European Center for Nuclear Research, Electronic Power Converter group (TE-EPC), CH-1211 Geneva 23, Switzerland)
AP-2 #60Progressive Module Redundancy for Fault-Tolerant Designs in Nanoelectronics
T. Ban, L. Naviner
(Institut Télécom, Télécom ParisTech, CNRS-LTCI 46, rue Barrault, 75634 Paris Cedex 13, France)
AP-3 #110Control of the Electromagnetic compatibility: an issue for IC reliability
J.-B. Grosa, G. Duchampa, J.-L. Levantb, C. Marotc
(aUniversité Bordeaux 1, Laboratoire IMS, 351 cours de la Libération, 33405 TALENCE, France, bATMEL Nantes, Route de Gachet, 44300 NANTES, France, cEADS France, 18 rue Marius Terce, BP 13050, 31025 TOULOUSE Cedex 03, France)
AP-4 #145Leakage Current, active power, and Delay Analysis of Dynamic Dual Vt CMOS Circuits under P-V-T Fluctuations
J. Wanga, N. Gongb, L. Houa, X. Penga, R. Sridharb, W. Wua
(aVLSI and System Lab, Beijing University of Technology, Beijing 100124, China, bDepartment of Computer Science and Engineering, SUNY at Buffalo, Buffalo, NY 14260, USA)
AP-5 #159A simplified procedure for the analysis of safety instrumented systems in the process industry application
M. Catelani, L. Ciani, V. Luongo
(Department of Electronics and Telecommunications, University of Florence Via S. Marta 3, 50139 Florence, Italy)
BP-1 #20Concurrent PBTI and hot carrier degradation in n-channel MuGFETs
S. M. Leea, D. H. Leea, J. K. Leeb, J. T. Parka
(aDepartment of Electronics Engineering, University of Incheon, #119 Academi-Ro Yonsoo-Gu, Incheon 406-772, Republic of Korea, bDepartment of Information Engineering, Gachon Univ. of Medicine and Science, #534-2 Yeonsu 3-Dong Yeonsou-Gu, Incheon 406-799, Republic of Korea)
BP-2 #19Effects of device layout on the drain breakdown voltages in MuGFETs
J. Y. Kim, C. G. Yu, J. T. Park
(Department of Electronics Engineering, University of Incheon, #119 Academi-Ro Yonsoo-Gu, Incheon 406-772, Republic of Korea)
BP-3 #50S-parameter performance degradation in power RF N-LDMOS devices due to hot carrier effects
M.A. Belaïda, M. Garesa, K. Daoudb, P. Eudelinec
(aUniversity of Gabes, 6072 Gabes, Tunisia, bGPM-UMR CNRS 6634, University of Rouen, 76801 Saint Etienne du Rouvray, France, cTHALES Air Defence, ZI du Mont Jarret, 76520 Ymare, France)
BP-4 #54Study of the impact of hot carrier injection to immunity of MOSFET to electromagnetic interferences
B. Lia, N. Berbelb, A. Boyera, S. Bendhiaa, R. Fernández-Garcíab
(aINSA de Toulouse, Avenue de Rangueil 135, 31077 Toulouse, France, bElectronic Engineering Department, UPC, Barcelona Tech, Colom 1, 08222 Terrassa, Spain)
BP-5 #112Matching degradation of threshold voltage and gate voltage of NMOSFET after Hot Carrier Injection stress
Y. Jolya,b, L. Lopeza, J.-M. Portalb, H. Azizab, J.-L. Ogiera, Y. Berta, F. Juliena, P. Fornaraa
(aSTMicroelectronics, 190 Avenue Célestin Coq Zone Industrielle, 13106 Rousset, France, bIM2NP Laboratory (UMR CNRS 6242), 38 rue Frédéric Joliot Curie, 13451 Marseille, France)
BP-6 #121Experimental verification of the usefulness of the n-th power law MOSFET model under hot carrier wearout
N. Berbela, R. Fernández-Garcíaa, I. Gila, B. Lib, A. Boyerb, S. Bendhiab
(aElectronic Engineering Department, UPC Barcelona Tech., Colom 1, 08222 Terrassa, Spain, bDépartment du Genie Electrique et Informatique, INSA de Toulouse, Avenue de Rangueil 135, 31077 Toulouse, France)
BP-7 #30Impact of Irregular Geometries on Low-K Dielectric Breakdown
M. Bashir, L. Milor, D. H. Kim, S. K. Lim
(School of Electrical and Computer Engineering, Georgia Institute of Technology, Atlanta, GA 30332, USA)
BP-8 #33Influence of Air Gaps on the Thermal Electrical Mechanical Behavior of a Copper Metallization
I. Bauer, K. Weide-Zaage, L. Meinshausen
(Laboratorium für Informationstechnologie, Gottfried Wilhelm Leibniz Universität Hannover, Schneiderberg 32, 30167 Hannover, Germany)
CP-1 #151Synthesis of Scanning Electron Microscopy Images by High Performance Computing for the Metrology of Advanced CMOS Processes
A. Esposito, M. Ciappa, W. Fichtner
(ETH-Zurich, Integrated Systems Laboratory, ETH-Zentrum, CH-8092 Zurich, Switzerland)
CP-2 #7Dynamic defect localization using FPGA to monitor digital values
L. Saury, S. Cany
(ST-Ericsson, Failure Analysis Laboratory, 12 rue Jules Horowitz, F-38019 Grenoble Cedex, France)
CP-3 #32Backside Failure analysis case study: Implementation of innovative Local Backside Deprocessing technique
A. Laroche, P. Rousseille, T. Zirilli
(Toulouse Product Analysis Lab, Quality Division, Freescale Semiconductor, France)
DP-1 #10Reliability Study of AlGaN/GaN HEMT under Electromagnetic, RD and DC stress
S. Khemiri, M. Kadi, A. Louis
(IRSEEM/ESIGELEC Technopôle du Madrillet, 76801 Saint Etienne du Rouvray, France)
DP-2 #29Thermal optimization of GaN-on-Si HEMTs with plastic package
R. Liua,b, D. Schreursa, W. De Raedtb, F. Vanaverbekeb, R. Mertensa,b, I. De Wolfb,c
(aDepartment of Electrical Engineering, K.U. Leuven, Kasteelpark Arenberg 10, 3001 Leuven, Belgium, bimec vzw, Kapeldreef 75, 3001 Leuven, Belgium, cDepartment of Metallurgy and Materials Engineering, K.U. Leuven, Kasteelpark Arenberg 44, 3001 Leuven, Belgium)
DP-3 #55Effects of Channel Thickness Variation on Bias Stress Instability of InGaZnO Thin-film Transistors
E. N. Cho, J. H. Kang, I. Yun
(Department of Electrical and Electronic Engineering, 262 Seongsanno, Seodaemun-gu, Yonsei University, Seoul 120-749, Republic of Korea)
DP-4 #66Characterization of the self-heating of AlGaN/GaN HEMTs during an electrical stress by using Raman spectroscopy
F. Bertheta,b, Y. Guhela, H. Gualousa, B. Boudarta, J.L. Troletb, M. Piccioneb, C. Gaquiérec
(aLUSAC, Université de Caen Basse-Normandie, Site Universitaire, 50130 Cherbourg-Octeville, France, bEAMEA, Boulevard de la Bretonnière, BP n° 19, Cherbourg Armées 50115, France, cIEMN, Cité scientifique, BP 60069, 59652 Villeneuve d’Ascq, France)
DP-5 #78QALT study of scintillating material in digital flat panels for medical imaging
M. Béranger, N. Vallet, M. Dorel, P. Huet, K. Cadoret
(Trixell, Z.I. Centr’Alp, 460 rue du Pommarin, 38430 Moirans, France)
DP-6 #93Accelerated Life Tests of High Power White Light Emitting Diodes based on Package Failure Mechanisms
S.I. Chana, W.S. Honga, K.T. Kimb, Y.G. Yoonc, J.H. Hanc, J.S. Jangd
(aReliability Physics Research Center, Korea Electronic Technology Institute, Seongnam, Republic of Korea, bDepartment of Industrial Engineering, Graduate School of Ajou University, Suwon, Republic of Korea, cReliability Assessment Team, Korea Testing Certification, Gunpo, Republic of Korea, dDivision of Industrial and Information System Engineering, Ajou University, Suwon, Republic of Korea)
DP-7 #100Outdoor degradation assessment of concentration photovoltaic modules equipped with single-junction solar cells
F. Raffaele, L. Laura, L. Gianni, P. Carlo
(ENEA Portici Research Center - Portici (Naples), Italy)
EP-1 #4A time-domain physics-of-failure model for the lifetime prediction of wire bond interconnects
L. Yang, P.A. Agyakwa, C.M. Johnson
(Department of Electrical & Electronic Engineering, The University of Nottingham, University Park, Nottingham NG7 2RD, UK)
EP-2 #149Investigation methods and approaches for alleviating charge trapping phenomena in RF-MEMS switches submitted to cycling test
A. Massenza, M. Barbatoa, V. Gilibertoa, B. Margesinb, S. Colpob, G. Meneghessoa,c
(aDepartment of Information Engineering, University of Padova, Via Gradenigo 6/b, 35100 Padova, Italy, bMEMS Research Unit, Fondazione Bruno Kessler – FBK, Via Sommarive 18, 38123 Povo, Trento, Italy, cItalian Universities NanoElectronics Team (IUNET), Via Toffano 2, 40125 Bologna, Italy)
EP-3 #153Optimization of wire connections design for power electronics
Y. Celnikiera, L. Duponta, E. Hervéb, G. Coquerya, L. Benaboub
(aLaboratoire des Technologies Nouvelles (LTN-IFSTTAR), 25 Allée des Marronniers, 78000 Versailles, France, bLaboratoire d’Ingénierie des Systèmes de Versailles (LISV), Université de Versailles Saint-Quentin, 45 Avenue des Etats-Unis, 78035 Versailles, France)
EP-4 #3Studies on the solder joint reliability of CTBGA assemblies with various adhesives using the package shear test method
H. Shi, T. Ueda
(Room S257, Graduate School of Information, Production and Systems, Waseda University, 2-7 Hibikino, Wakamatsu-ku, Kitakyushu-shi, Fukuoka 808-0135, Japan)
EP-5 #16An overview of the reliability prediction related aspects of high power IGBTs in wind power applications
C. Buscaa, R. Teodorescua, F. Blaabjerga, S. Munk-Nielsena, L. Helleb, T. Abeyasekerab, P. Rodriguezc
(aDepartment of Energy Technology, Aalborg University, Pontoppidanstraede 101, Room 47, Aalborg 9220, Denmark, bVestas Wind System A/S, Hedeager 42, Aarhus 9220, Denmark, cDepartment of Electrical Engineering, Technical University of Catalonia, Terrassa 08222, C. Colom 1, Spain)
FP-1 #76Dynamic active cooling for improved power system reliability
A. Castellazzi, W.J. Choy, P. Zanchetta
(Department of Electrical and Electronic Engineering, University of Nottingham, Nottingham NG7 2RD, UK)
FP-2 #111Aging monitoring of lithium-ion cell during power cycling tests
A. Eddahech, O. Briat, H. Henry, J.-Y. Delétage, E. Woirgard, J.-M. Vinassa
(Laboratoire IMS UMR 5218 CNRS, IPB, Université Bordeaux 1, 351 Cours de la Libération, 33405 Talence Cedex, France)
FP-3 #115"Design for EMI" approach on power PiN diode reverse recovery
M. Tsukudaa,b, K. Kawakamia, K. Takahamaa, I. Omuraa
(aKushu Institute of Technology, 1-1 Sensui-cho, Tobata-ku, Kitakyushu, Japan, bThe International Centre for the Study of East Asian Development, 1-103 Hibikinokita, Wakamatsu-ku, Kitakyushu, Japan)
FP-4 #118How supercapacitors reach end of life criteria during calendar life and power cycling tests
R. Chaari, O. Briat, J.Y. Delétage, E. Woirgard, J.-M. Vinassa
(Laboratoire IMS UMR 5218 CNRS, IPB, Université Bordeaux 1, 351 Cours de la Libération, 33405 Talence Cedex, France)
FP-5 #139MOS-IGBT Power Devices for High-Temperature Operation in smart power SOI technology
H. Arbess, M. Bafleur
(CNRS, LAAS, 7 avenue du colonel Roche, F-31077 Toulouse, France, Universite´ de Toulouse, UPS, INSA, INP, ISAE, UT1, UTM, LAAS, F-31077 Toulouse, France)
FP-6 #126Characterization and modeling of single event transients in LDMOS-SOI FETs
J. Alvaradoa, V. Kilchytskab, E. Boufoussb, D. Flandreb
(aDepartamento de Ingeniería en Telecomunicaciones, División de Ingeniería Eléctrica, Facultad de Ingeniería, Universidad Nacional Autónoma de México, Cd. Universitaria, Coyoacán, C.P. 04510, México D.F., Mexico, bMicroelectronics Laboratory (Institute ICTEAM), Université catholique de Louvain, Place du Levant 3, B-1348 Louvain-la-Neuve, Belgium)
FP-7 #130Total ionizing dose effects on Punch-Through Insulated Gate Bipolar Transistors turn-on switching behaviour
B. Tala-Ighila, A. Oukaoura, H. Gualousa, B. Boudarta, B. Pouderouxa, J.-L. Troletb, M. Piccioneb
(aLaboratoire Universitaire des Sciences Appliquées de Cherbourg, ESIX Normandie, Université de Caen/Basse-Normandie, Rue Louis Aragon, BP 78, 50130 Cherbourg-Octeville, France, bEcole des Applications Militaires de l’Energie Atomique, Boulevard de la Bretonnière, BP 19, 50115 Cherbourg Armées, France)